If the three stages of execution in pipelining are overlapped, how would be the speed of execution?

Which function/s is/are provided by Integrated Memory Management Unit in 80386 architecture?

A. Optional on-chip paging

B. 4 levels of protection

C. Virtual Memory Support

D. All of the above

Which unit in 80386 DX architecture plays a crucial role in the conversion of linear address to physical address?

A. Execution

B. Protection

C. Segmentation

D. Paging

In Intel x86 architecture, which general purpose register is used for repeated string instructions as well as shift, rotate and loop instructions?

A. EAX (Accumulator)

B. ECX (Counter)

C. EDX (Data register)

D. EBP (Data Pointer)

Which status flag in x86 family is used to enable or disable the interrupt especially when the Pentium processor operates in the virtual mode?

A. ID

B. VIP

C. VIF

D. AC

Which control register in x86 family is reserved for future use and generally not adopted for current implementation?

A. CR0

B. CR1

C. CR2

D. CR4